1. Field of the Invention
This invention generally relates to detecting metal contamination. Certain embodiments relate to determining metal contamination in a semiconductor substrate or a dielectric material by measuring electrical parameters of the semiconductor substrate or the dielectric material.
2. Description of the Related Art
Metal contamination on a semiconductor substrate may degrade the electrical properties of the semiconductor substrate. For example, metal contamination in the bulk semiconductor substrate may cause the bulk minority carrier lifetime to decrease because the metal contamination may assist in the recombination of electrons and holes in the semiconductor substrate. When metal contamination is present in a dielectric material formed upon the semiconductor substrate or on a surface of the semiconductor substrate, the metal contamination may cause the electrical properties of the dielectric material to degrade. As such, the electrical properties of the dielectric material and the semiconductor substrate may be measured to determine the amount of metal contamination. Metal contamination may have a significant impact on the performance and reliability of semiconductor devices. Metal contamination may be deposited on a semiconductor wafer during processing and manufacturing of semiconductor devices. In many cases, a portion or substantially all of the metal contamination may be deposited on the surface of the semiconductor substrate due to problems in processing or improper handling of the semiconductor substrates.
The metal contamination may currently be measured by physical analysis of a dielectric material or a semiconductor substrate. Examples of physical analysis techniques include, but are not limited to, secondary ion mass spectroscopy (SIMS), total reflection x-ray fluorescence (TXRF), and vapor phase decomposition inductively coupled plasma mass spectroscopy (VPD-ICPMS). The disadvantage to using one of these physical analysis techniques to determine the metal contamination is that these measurement techniques generally take a very long time. As such, the throughput or the number of wafers which may be processed in a given period of time may be relatively low compared to the number of wafers which may need to be examined during a manufacturing process. In addition, SIMS and VPD-ICPMS are destructive techniques which generally require removal of a portion of the dielectric material or semiconductor substrate during the measurement process.
The metal contamination may also currently be measured using device-based electrical characterization. These testing techniques may provide a measurement of the metal contamination that is very similar to metal contamination found on manufactured semiconductor devices. This type of testing, however, requires forming semiconductor devices on the dielectric material or on the semiconductor substrate. As such, device-based electrical characterization may be expensive and time consuming. In addition, analyzing the data also becomes complicated due to the number of processing steps that may be performed in order to form the semiconductor devices on the dielectric material or on the semiconductor substrate.
The metal contamination, however, may also be determined by using a non-contact work function and a surface photo-voltage measurement technique. This testing technique may include biasing the wafer using a corona charge deposited by a corona charge deposition system. The testing technique may also include measuring the surface voltage by using a work function sensor. Additionally, the band bending of the semiconductor substrate may also be measured using a surface photo-voltage sensor. As such, the surface voltage and the band bending of the semiconductor substrate may be functions of the electrical bias, which may be generated by the charge deposited by using a corona charging device. Examples of non-contact corona charging devices are illustrated in U.S. Pat. No. 4,599,558 to Castellano et al., U.S. Pat. No. 5,594,247 to Verkuil et al., and U.S. Pat. No. 5,644,223 to Verkuil, which are incorporated by reference as if fully set forth herein. Examples of work function sensors and surface photo-voltage sensors are illustrated in U.S. Pat. No. 4,812,756 to Curtis et al., U.S. Pat. No. 5,485,091 to Verkuil, U.S. Pat. No. 5,650,731 to Fung, and U.S. Pat. No. 5,767,693 to Verkuil, which are incorporated by reference as if fully set forth herein. Examples of using work function sensors and surface photo-voltage sensors to measure the electrical properties of dielectric materials are illustrated in U.S. Pat. No. 6,202,029 to Verkuil et al. and U.S. Pat. No. 6,191,605 to Miller et al., which are incorporated by reference as if fully set forth herein. Additional examples of systems and devices which may be used to determine the metal contamination in a semiconductor substrate includes xe2x80x9cA New Approach for Measuring Oxide Thicknessxe2x80x9d, Miller, Semiconductor International, July 1995, and is incorporated by reference as if fully set forth herein.
Accordingly, it would be advantageous to develop a nondestructive testing method to rapidly and accurately measure the metal contamination on a semiconductor topography without sacrificing product wafers and without forming semiconductor devices on the semiconductor topography.
In an embodiment, metal contamination in a dielectric material disposed upon a semiconductor substrate may be detected by annealing the semiconductor substrate such that a portion of the metal contamination is driven into the dielectric material. In some embodiments, the annealing process may be effective to drive only one type of metal contamination into the dielectric material. The annealing process, however, may also be effective to drive at least two types of metal contamination into the dielectric material. After the semiconductor substrate is annealed, an electrical property of the dielectric material may be measured. The electrical property may include a surface voltage, a flatband voltage, an interface trap density, a total dielectric charge of the charged dielectric material, or a determined resistivity of the dielectric material. The measured electrical property may be used to determine a characteristic of the metal contaminant. Characteristics may include determining the presence of metal contaminants, the identity of the metal contaminant, and the concentration of the metal contaminants, or all of the above.
In one embodiment, a charge may be deposited on an upper surface of the dielectric material to facilitate measurement of the electrical property. The charge may be deposited using, e.g., a corona charging technique. The deposited charge may be effective to cause a tunneling condition of the dielectric material. After the charge is deposited on the dielectric material, the tunneling voltage of the dielectric material may be measured. The tunneling voltage may be used to determine a tunneling field of the dielectric material. The tunneling voltage and/or the tunneling field may be used to determine the presence of metal contamination in the dielectric material.
The characteristic of the metal contamination in the dielectric material may be determined as a function of the measured electrical property (e.g., tunneling voltage or the tunneling field). Determining the characteristic of the metal contamination in the dielectric material may include determining a characteristic of one type of metal contamination or characteristics of at least two types of metal contamination. Alternatively, the surface voltage may be measured as a function of time. In this manner, a resistivity of the dielectric material may also be determined.
In a further embodiment, a method for detecting metal contamination in a semiconductor substrate is provided. The semiconductor substrate may have a dielectric material formed thereon. The method may include annealing the semiconductor substrate such that the annealing process is effective to drive only one type of metal contamination into the semiconductor substrate. The annealing process may also be effective to drive more than one type of metal contamination into the semiconductor substrate. A charge may be deposited on the semiconductor substrate, and a surface voltage of the semiconductor substrate may be measured by using a non-contact work function measurement technique. In addition, a pulse of light may be directed toward the semiconductor substrate. In this manner, a surface photo-voltage may also be measured. The surface photo-voltage may be measured as a function of time. A bulk minority carrier lifetime may be determined by using the measured surface photo-voltage of the semiconductor substrate. The surface photo-voltage may also be used to determine a characteristic of the metal contamination in the semiconductor substrate. The characteristic of the metal contamination in the semiconductor substrate may be a function of the measured surface photo-voltage or of the determined bulk minority carrier lifetime. The characteristic may be determined for only one, or more than one type of metal contamination.
In an additional embodiment, a system may be configured to measure a characteristic of metal contamination in a semiconductor topography. The semiconductor topography may include a semiconductor substrate or a dielectric material formed upon an upper surface of a semiconductor substrate. The system may include an oven that may be used to anneal the semiconductor topography. The oven may be configured to heat the semiconductor topography such that only one type of metal contamination may be driven into the semiconductor topography. The oven may also be configured to heat the semiconductor topography such that more than one type of metal contamination may be driven into the semiconductor topography. The system may also include a device that may be used to deposit a charge on an upper surface of the semiconductor topography. The device may include a non-contact corona charging device. The device may be configured to deposit a charge on predetermined regions of the semiconductor topography or on randomly determined regions of the semiconductor topography. The device may also be configured to deposit a charge on a portion of the semiconductor topography or on substantially the entire semiconductor topography. The system may further include a sensor that may be used to measure at least one electrical property of the charged upper surface of the semiconductor topography. The electrical property may include a tunneling voltage or a tunneling field, a surface voltage, a flatband voltage, an interface trap density, or a total dielectric charge of the charged dielectric material. The sensor may include a non-contact work function sensor and a surface photo-voltage measurement device. Furthermore, the system may also include an illumination system, which may be used to direct a pulse of light toward the semiconductor substrate. As such, the illumination system may be used to direct the light toward the semiconductor substrate subsequent to depositing the charge. The sensor may be used to determine a surface photo-voltage of the semiconductor topography. The system may also include an operating system that may be used to determine a characteristic of the metal contamination in the semiconductor substrate. The characteristic may be determined as a function of any of the measured electrical properties described above.
In an embodiment, a method for fabricating a semiconductor device on a semiconductor substrate may also be provided. The semiconductor topography may include a semiconductor substrate or a dielectric material disposed upon the semiconductor substrate. The method may include annealing the semiconductor topography which may be effective to drive at least one type of metal contamination into the semiconductor substrate or the dielectric material. An electrical property of the semiconductor substrate or the dielectric material may be measured. Measuring the electrical property may include depositing a charge on an upper surface of the dielectric material or the semiconductor substrate. The electrical property may be measured using a non-contact work function technique or a non-contact surface photo-voltage measurement technique. The method may further include determining a characteristic of the metal contamination in the semiconductor topography. The characteristic of the semiconductor topography may be a function of the measured electrical property of the dielectric material or the semiconductor substrate. The method may also include comparing the determined characteristic of the metal contamination to a range of acceptable characteristics of the metal contamination. The range of acceptable characteristics of the metal contamination may include levels of the metal contamination that may not substantially hinder the performance of a semiconductor device. As such, if the determined characteristic is within the range of acceptable characteristics of the metal contamination, the method may include forming a semiconductor device on the semiconductor topography.